Thermal analysis and optimization of 2.5D and 3D integrated systems with wide I/O memory

During the design of 2.5D and 3D integrated systems the thermal management of the whole system is important, especially in high performance systems with combinations of processor and memory dies utilizing the Wide I/O memory interface. Because cooling solutions could be very expensive they should be considered in very early design cycles. For example, the decision if the system is implemented as a real stacked system or using an interposer strongly influences the required cooling solution. Furthermore, high performance systems with data transfer rates in the range of 100 Gbit/s to400 Gbit/s between processor and memory require an early and fast floorplan calculation to determine and optimize the heat distribution within the system (i.e., dies and package).In this paper, an appropriate floorplanner with direct access to an octree based finite element solver for the calculation of the heat distribution of the whole system is presented. Our approach allows an efficient design space exploration. The thermal simulation on system level, including heat sink and package, makes it unnecessary to manually set the boundary conditions of the chips. Thus, this approach prevents possible errors caused by this step. To illustrate the new analysis and optimization approach, it is applied to a Wide I/O 2.5D or 3D integrated system, respectively.