• English
  • Deutsch
  • Log In
    Password Login
    Research Outputs
    Fundings & Projects
    Researchers
    Institutes
    Statistics
Repository logo
Fraunhofer-Gesellschaft
  1. Home
  2. Fraunhofer-Gesellschaft
  3. Konferenzschrift
  4. Simulation-based evaluation of the ramp-up behavior of waferfabs
 
  • Details
  • Full
Options
2003
Conference Paper
Title

Simulation-based evaluation of the ramp-up behavior of waferfabs

Abstract
In this paper we present a simulation study of wafer fab ramp-up scenarios with the simulation software AutoSched AP. A generic factory model (MIMAC 1 from Int. SEMATECH) was adapted to simulate fab ramp-up scenarios. The model was customized to consider time phased modeling capability and time phased reporting. Additionally, an evaluation approach for the comparison of different ramp-up scenarios is presented. This approach helps to evaluate the ramp-up performance with different input parameters. A systematic variation of dispatch rules and lot sizes during ramp-up is shown.
Author(s)
Sturm, R.
Dorner, J.
Reddig, K.
Seidelmann, J.
Mainwork
ASMC 2003, the 14th annual IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop. Proceedings  
Conference
Advanced Semiconductor Manufacturing Conference and Workshop (ASMC) 2003  
DOI
10.1109/ASMC.2003.1194478
Language
English
Fraunhofer-Institut für Produktionstechnik und Automatisierung IPA  
Keyword(s)
  • wafer

  • ramp up

  • Fertigungsanlauf

  • Simulation

  • Halbleiter

  • Fertigung

  • Cookie settings
  • Imprint
  • Privacy policy
  • Api
  • Contact
© 2024