Now showing 1 - 10 of 12
  • Publication
    Modular Ultra-Low-Power IoT-Core - Bridging the Gap Between Power Electronics and Distributed Sensor Networks
    ( 2022) ;
    Al-Magazachi, Samer
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    Rezaei, Alireza
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    Hager, Jan
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    Gerstner, Holger
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    Eckardt, Bernd
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    In this paper, the authors present an innovative ultra-low-power IoT-Core that can be used as an extension for efficient DC/DC converters. The module equips the overall system with computation and communication capabilities for Industry 4.0 and IIoT applications without adding significant power requirements. The research focuses on optimizing energy consumption by taking an overarching view of hardware and software at the system level. In the active state, the IoT-Core can adjust its power consumption at runtime by matching the application demands to the existing energy budget. In sleep state, the module uses a novel Wake-Up Receiver in the 868 MHz frequency band with an average power consumption of 3.5µW, allowing the system to wake up in 32ms. The results are demonstrated on a DC/DC converter, with an efficiency of up to 99.8%, which uses the plug-and-play IoT-Core to become a smart device that can save additional energy when being in idle mode.
  • Publication
    Very-Thin System-in-Package Technology for Structural Analysis
    ( 2019) ; ;
    Böttcher, Mathias
    The integration of very-thin electronic systems will enable new application fields like structural analysis of components used in aviation, windmills or other critical applications. Presented are two integration options, by using flexible substrates or a RDLFirst packaging approach suitable for multiple device assembly. The RDLFirst is very thin and the flip-chip devices can be thinned also, so that the overall system gets very thin. One main difference to flexible substrate is the possible line space, which is in the region of 100um for flexible substrates and down to some um for RDLFirst.
  • Publication
    HBM and ASIC silicon interposer
    ( 2019)
    Puschmann, René
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    The presented project shows the realization and selected analyses results of the first stage of a passive interposer chip for high performance data transfer between processor and memory dies, a 2D HBM (high bandwidth memory) interposer. The realized interposer chip can carry 8 HBM dies with each having 10'000 connections and one ASIC die with 80'000connections. A complex design was reduced from 5 to 3 levels of redistribution layers, which significantly saves manufacturing costs. By using line/space dimensions of 4 mm a mask aligner could be utilized for exposure. Therefore big interposer dies of 44 mm by 44 mm can be produced using relatively simple lithography technology at high per wafer yield. All technology is demonstrated on 300 mm silicon wafers.
  • Publication
    Plattformkonzept zum Aufbau von hochintegrierten Multisensorknoten
    Diese Veröffentlichung stellt das Konzept und die dazugehörige Packaginglösung einer universellen IoT Sensorplattformmit einer System-on-Chip (SoC) Familie als zentrale Steuer- und Recheneinheit vor. Die Plattform besteht aus 4 Ebenen, die angefangen vom hochintegrierten SoC, über die Montagemöglichkeit von gehäusten wie auch ungehäusten Sensoren bis hin zum System Board, was die üblichsten drahtgebundenen und drahtlosen Schnittstellen zur Verfügung stellt. Das Layout zur Sensormontage kann auf individuelle Kundenwünsche angepasst werden, um so spezielle Anforderungen an die Messaufgabe zu ermöglichen. Die Kerntechnologie des Packages besteht aus einem Moldpackage in Fan-Out Technologiemit unterseitiger Umverdrahtung des SoC zu den Balling Pads und Durchführungen zur oberseitigen Umverdrahtungfür die Montage der Sensoren.
  • Publication
    Energy harvesting and conversion - applications of piezoelectric transformer and transducer MEMS
    ( 2018)
    Radecker, Matthias
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    Kunzmann, Jan
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    Gu-Stoppel, Shan-Shan
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    Yang, Yujia
    A systematic investigation of the feasibility to integrate complete piezo-based power supply on silicon was done. Up to now, fully integrated off-line power supplies on chip are available as products for below 1 Watts. Higher power levels up to 10 Watts and more are strongly desired for many miniaturized applications as Off-Line LED light sources, integrated power supplies for communication devices as iPhone, portable devices for medical applications, portable beamers an others. The integration of high-efficient power supplies based on magnetic transformers (PT) including galvanic isolation is limited due to the physics of electromagnetism. Piezoelectric transformers can be integrated as MEMS when PZT material is applied on silicon to a height of several Micrometers to form an oscillating device which will be processed after micro-bonding in an etching process. Although power density of discrete PT is already high, it can be increased by a factor of 100 to 1000 in integrated devices on silicon taking advantage of uniform crystal structure of sputtering process and improved heat removal through silicon. Serial piezo-transformer-strings allow for high isolating voltage up to 4 kV and provide efficiency up to 95% or more, but unfortunately on the cost of significant large chip area. However, piezoelectric transformers will gain higher acceptance in power converters if a magnetic-field-free environment is requested as for magnetic resonance tomography. Promising piezoelectric applications can be found for transformer-transducer units to harvest ultrasonic energy, preferably in medical therapy-diagnosis applications, but further, in industrial autonomous sensor supplies with avoidance of electromagnetic disturbance. Piezoelectric energy harvesting becomes attractive using ultrasonic energy harvester MEMS with wide range frequency excitation using permanent magnet cantilever construction. Ultrasonic MEMS loudspeakers are miniaturized alternatives to traditional magnetic devices. The advantage of piezoelectric MEMS applications will result in an extreme miniaturization compared to conventional power conversion by magnetic or electrostatic solutions. High reliability including intelligent integrated functions in some cases may improve the practicability of piezoelectric MEMS.
  • Publication
    Functional integration - structure-integrated wireless sensor technology targeting smart mechanical engineering applications
    Functional integration on the micro/nano scales enables smart functionalities in mechanical engineering systems. Here, exemplarily shown for a ball screw drive, a structure-integrated wireless sensor technology is implemented into a manufacturing system for advanced process control and status monitoring - even at machine components being not yet accessible or difficult to access. This includes also a miniaturized, networked and energy-efficient information and communication technology (ICT) integrated into the machine.
  • Publication
    Interposer-based smartcard system with active wireless communication
    ( 2017) ; ;
    Böttcher, Mathias
    The trend to integrate more and more functionality into smaller and smaller devices is still ongoing. Most smart systems are communicating wireless, while non-stationary systems require an integrated power supply. This paper presents a system, which is integrated into a standardized smartcard format and is capable of active wireless transmission and can be used for location detection, ranging, localization or access control. The dimension of an ISO 7816 ID-1 smartcard, which is the most common used smartcard, is about 86 by 54 mm. Integrating a smart system on this dimensions is not an problem. But the maximal height of a smartcard is only 0.76 millimeters. So integrating functionality by using multiple components is still an issue.
  • Publication
    Miniaturization of power converters by piezoelectric transformers - chances and challenges
    ( 2017)
    Radecker, Matthias
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    Gu-Stoppel, Shan-Shan
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    ; ;
    Yang, Yujia
    A systematic approach of the feasibility to integrate complete piezo-based power supply on silicon is the focus of research activities within Fraunhofer EAS, ISIT an IZM. Up to now, fully integrated off-line power supplies on chip are available for below 1 Watts, e.g. from Texas Instruments. Higher power levels up to 10 Watts and more are strongly desired for many miniaturized applications as Off-Line LED light sources, integrated power supplies for communication devices as iPhone, portable devices for medical applications, portable beamers an others. The integration of high-efficient power supplies based on magnetic transformers (PT) including galvanic isolation is limited due to the physics of electromagnetism. Piezoelectric transformers can be integrated when PZT material is applied on silicon to a height of several Micrometers to form an oscillating device which will be processed after micro-bonding in an etching process. Although power density of discrete PT is already high, it can be increased by a factor of 100 to 1000 in integrated devices on silicon taking advantage of uniform crystal structure of sputtering process and improved heat removal through silicon. The driving topology can be formed by high-voltage Mosfets or multi-level low-voltage Mosfet topology based on SOI or GaN on Si and integrated micro-inductors in the future. Serial piezo-transformer-strings allow for high isolating voltage up to 4 kV and provide efficiency up to 95% or more. Synchronous rectifying devices can be formed by low-voltage Mosfets at the output stage of the power supply. The advantage will be an extreme miniaturization compared to discrete power supplies, reduction of blocking capacitors by interleaving techniques, and thus, high reliability including intelligent integrated functions as stabilization circuits, sensors or control.
  • Publication
    Entwurfsmethoden für verbesserte robuste Batteriemanagementsysteme. Teilvorhaben
    (Fraunhofer IIS / EAS, 2016)
    Dietrich, Manfred
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    Gulbins, Matthias
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    Haase, Joachim
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  • Publication
    Vertical interconnections using through encapsulant via (TEV) and through silicon via (TSV) for high-frequency system-in-package integration
    ( 2014)
    Wojnowski, M.
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    Pressel, K.
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    Beer, G.
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    Dittrich, Michael
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    Wolf, Jürgen
    In this paper we investigate two vertical interconnect options for high-frequency system-in-package (SiP) integration: through encapsulant via (TEV) applied to the embedded wafer level ball grid array (eWLB) technology and through silicon via (TSV). We compare both solutions in terms of size and electrical performance. We use analytic expressions and electromagnetic simulations for our analysis and present measurement results of selected structures for verification. The results show that the choice of TEV and TSV depends on application and cost window.