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  4. Miniaturization of power converters by piezoelectric transformers - chances and challenges
 
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2017
Presentation
Title

Miniaturization of power converters by piezoelectric transformers - chances and challenges

Title Supplement
Presentation held at International Symposium on Piezocomposite Applications, ISPA 2017, September 13 - 15, 2017, Fraunhofer IKTS Dresden
Abstract
A systematic approach of the feasibility to integrate complete piezo-based power supply on silicon is the focus of research activities within Fraunhofer EAS, ISIT an IZM. Up to now, fully integrated off-line power supplies on chip are available for below 1 Watts, e.g. from Texas Instruments. Higher power levels up to 10 Watts and more are strongly desired for many miniaturized applications as Off-Line LED light sources, integrated power supplies for communication devices as iPhone, portable devices for medical applications, portable beamers an others. The integration of high-efficient power supplies based on magnetic transformers (PT) including galvanic isolation is limited due to the physics of electromagnetism. Piezoelectric transformers can be integrated when PZT material is applied on silicon to a height of several Micrometers to form an oscillating device which will be processed after micro-bonding in an etching process. Although power density of discrete PT is already high, it can be increased by a factor of 100 to 1000 in integrated devices on silicon taking advantage of uniform crystal structure of sputtering process and improved heat removal through silicon. The driving topology can be formed by high-voltage Mosfets or multi-level low-voltage Mosfet topology based on SOI or GaN on Si and integrated micro-inductors in the future. Serial piezo-transformer-strings allow for high isolating voltage up to 4 kV and provide efficiency up to 95% or more. Synchronous rectifying devices can be formed by low-voltage Mosfets at the output stage of the power supply. The advantage will be an extreme miniaturization compared to discrete power supplies, reduction of blocking capacitors by interleaving techniques, and thus, high reliability including intelligent integrated functions as stabilization circuits, sensors or control.
Author(s)
Radecker, Matthias
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Quenzer, Hans-Joachim  
Fraunhofer-Institut für Siliziumtechnologie ISIT  
Gu-Stoppel, Shan-Shan
Fraunhofer-Institut für Siliziumtechnologie ISIT  
Reich, Torsten  
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Buhl, René  
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Yang, Yujia
Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration IZM  
Conference
International Symposium on Piezocomposite Applications (ISPA) 2017  
DOI
10.24406/publica-fhg-397957
File(s)
N-469965.pdf (2.85 MB)
Rights
Under Copyright
Language
English
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Fraunhofer-Institut für Siliziumtechnologie ISIT  
Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration IZM  
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