Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration IZM

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  • Patent
    Verfahren zum Auftragen von Material auf einen Bereich eines elektrischen Bauteils
    ( 2004)
    Manke, I.
    ;
    Becker, K.
    ;
    Ostmann, A.
    ;
    Aschenbrenner, R.
    ;
    Loeher, T.
    (B3) Bei einem Verfahren zum Auftragen einer Menge eines magnetischen oder magnetisierbaren Materials auf einen ausgewaehlten Bereich eines elektrischen Chips zum elektrischen Verbinden wird zunaechst das magnetische oder magnetisierbare Material sowie der ausgewaehlte Bereich, der zumindest teilweise magnetisch ist, bereitgestellt. Anschliessend wird das Material und der ausgewaehlte Bereich zusammengebracht, so dass durch eine magnetische Anziehungskraft zwischen dem Material und dem ausgewaehlten Bereich die Menge des Materials von dem ausgewaehlten Bereich angezogen wird und an dem ausgewaehlten Bereich haften bleibt.
  • Patent
    Gehaeustes Bauelement und Verfahren zu dessen Herstellung
    ( 2003)
    Reichl, H.
    ;
    Aschenbrenner, R.
    ;
    Ansorge, F.
    ;
    Becker, K.
    ;
    Ehrlich, R.
    ;
    Oppermann, H.
    ;
    Azdasht, G.
    NOVELTY - At least one component is located and contacted on the first region (102) of the substrate (100). The substrate flexible third region (106) is shaped such that the first and second region (104) are bent together to opposite each other and enclose at least one component. The coupling lines of the component(s) are brought out on a main surface (112) of the first and/or second substrate region outside, when folded over. USE - For dual in line package, quad flat package, multichip module, ball grid array module systems. ADVANTAGE - Small surface required for module assembly and flexible rewiring geometry.
  • Patent
    Verfahren zum Bilden einer strukturierten Metallisierung auf einem Halbleiterwafer
    ( 2002)
    Aschenbrenner, R.
    ;
    Azdasht, G.
    ;
    Zakel, E.
    ;
    Ostmann, A.
    ;
    Motulla, G.
    A process for forming a structured metallisation on a semiconductor wafer (20), in which a passivation layer (22) is applied onto the wafer main surface and is structured to define a bond pad (24), involves (a) producing a metal bump on the bond pad (24); (b) producing an activated dielectric on the passivation layer regions on which the structured metallisation is to be formed; and (c) chemically depositing metal on the activated dielectric and the metal bump. Also claimed are alternative processes involving (i) carrying out step (b), activating the bond pad and chemically depositing metal on the activated regions and the activated bond pad; (ii) producing an activated electrically conductive paste (40) on the bond pad (24) and on the passivation layer regions on which the structured metallisation is to be formed, followed by chemical metal deposition on the paste (40); or (iii) carrying out step (a), producing a structured metal foil on the metal bump and on the passivation layer reg ions on which the structured metallisation is to be formed, followed by chemical metal deposition on the metal foil. USE - Especially for chip wiring production on a semiconductor wafer. ADVANTAGE - Wiring of chip edge pads of the wafer in a planar configuration can be carried out in a simpler, quicker and less expensive manner than conventional processes which employ expensive sputtering operations.
  • Patent
    Verfahren zur Herstellung kontaktloser Chipkarten und kontaktlose Chipkarte
    ( 2001)
    Aschenbrenner, R.
    ;
    Ansorge, F.
    ;
    Zakel, E.
    ;
    Kasulke, P.
    The production of a novel, non-contact smart card (1) is claimed. The electrically-insulating, flat card is made with at least one recess(es) on one side. Conductive track(s) are applied in a given pattern, on the surface of the recessed side. The track(s) are applied on surfaces both within and outside the recess(es). Microcircuit chip(s) (4) are aligned in the recess(es) and brought into contact with the track(s). Also claimed is a contact-less smart card, essentially as described. USE - Used to make a contact-less smart card with potentially extremely wide application in private and public life. ADVANTAGE - The process manufactures non-contact smart cards, producing the coils especially, at low cost. Resistance to mechanical stress and reliability are good. Single stage processes are employed where possible. Hot Stamp coil application is particularly economic and adhesive on the coil underside completes attachment. High production rates are achieved. The coil transfers data and/or e nergy, acting as an antenna. Of various applicable mounting technologies, the flip-chip method is particularly compact. Contact bumps are conveniently and accurately formed and registered during the earlier hot-stamping stage. Hermetic sealing using glob top technology, increases the reliable life of the card.
  • Patent
    Verfahren und Vorrichtung zum Erzeugen einer leitfaehigen Struktur auf einem Substrat
    ( 2001)
    Nieland, C.
    ;
    Kallmayer, C.
    ;
    Miessner, R.
    ;
    Aschenbrenner, R.
    ;
    Ostmann, A.
    Bei einem Verfahren zum Erzeugen einer leitfaehigen Struktur auf einem Substrat wird zunaechst ein Material auf oder in Strukturen eines wiederverwendbaren Werkzeugtraegers aufgebracht oder eingebracht, um die leitfaehige Struktur auf oder in dem wiederverwendbaren Werkzeugtraeger zu erzeugen. Nachfolgend wird die erzeugte leitfaehige Strukur von dem wiederverwendbaren Werkzeugtraeger auf das Substrat uebertragen.
  • Patent
    Verfahren zur Herstellung kontaktloser Chipkarten und kontaktlose Chipkarte
    ( 1999)
    Aschenbrenner, R.
    ;
    Ansorge, F.
    ;
    Zakel, E.
    ;
    Kasulke, P.
    The method involves arranging an electrically conductive coil (2) on the surface of an insulating card (1). One or more non-packaged chips (4) are aligned in openings on the card surface. The electrical connections between the chip contacts and the coil contacts on the card surface are fabricated using flip-chip techniques. The card has openings may be made by injection moulding. The card body may be made of a thermoplastic material such as PVC, ABS or polycarbonate. USE - E.g. for telecommunication and identification, for insurance cards, patient data cards, emergency cards, credit cards or pay TV cards. ADVANTAGE - Provides good mechanical robustness and reliability.
  • Patent
    Verfahren zum Testen von mit einer Leiterbahnstruktur versehenen Substraten
    ( 1999)
    Zakel, E.
    ;
    Ansorge, F.
    ;
    Kasulke, P.
    ;
    Ostmann, A.
    ;
    Aschenbrenner, R.
    ;
    Dietrich, L.
  • Patent
    Chipkarte
    ( 1998)
    Aschenbrenner, R.
    ;
    Zakel, E.
    The smart card has a base (10) of plastic and an adhesive flexible substrate (14') that has a metallised outer surface (16) formed as a contact surface. The main surface of the card base has a recess (12). The leading end of the substrate is wrapped around the base and onto the underside. An integrated circuit chip (24) is set into the recess and a cover element (26) is bonded to enclose it. The contact surfaces are spaced to each other and are formed on both sides of the substrate. ADVANTAGE - Simple construction with contact surfaces.
  • Patent
    Chipanordnung und Verfahren zur Herstellung einer Chipanordnung
    ( 1998)
    Reichl, H.
    ;
    Auersperg, J.
    ;
    Simon, J.
    ;
    Aschenbrenner, R.
    ;
    Kloeser, J.
    ;
    Jung, E.
  • Patent
    Verfahren zum Herstellen von Palladiumkontaktbumps auf Halbleiterschaltungstraegern
    ( 1998)
    Meyer, H.
    ;
    Mahlkow, H.
    ;
    Aschenbrenner, R.
    Electroless deposition of uniformly thick, adherent Pd contact bumps (preferably of at least 2 microns height) on the aluminium conductor structures of semiconductor circuit carriers involves subjecting the conductor structure surfaces to (a) cleaning; (b) treatment with an acidic Pd ion-containing activating solution; and (c) electroless Pd deposition from a bath of pH 4-7 (preferably 5.3-5.8), containing Pd ions, formic acid (or derivative) as reductant and a nitrogen-containing complex former for the Pd ions. Also claimed are otherwise identical processes in which treatment with an aqueous zinc ion-containing solution is carried out between steps (a) and (b) and/or the Pd contact bumps have at least 2 microns height. Further claimed are (i) a semiconductor circuit carrier obtained by one of the above processes; and (ii) methods of contacting semiconductor circuit carriers with hybrid circuit carriers by the flip-chip technique using Pd contact bumps produced by the above processes. USE - Especially for contacting semiconductor chips with hybrid circuit carriers (e.g. circuit boards) by the flip-chip technique. ADVANTAGE - The processes allow reliable and adherent deposition of uniformly thick Pd contact bumps on aluminium surfaces. The bumps can be deposited to e.g. 20 microns thickness inexpensively and without the need for masks, have high adhesion, do not form surface oxide films on storage in air (so that the additional thin gold layer, used for Ni bumps, is not required) and are deposited in a pH range which does not cause attack of the aluminium.