A scalable PIC-based addressing unit for segmented quadrupole ion traps

Scalability is crucial for quantum computing to achieve high computing performance and ultimately true quantum advantage. Such a quantum computing platform requires elements to be replicated reliably within an extendable system framework. Photonic integrated circuits (PICs) allow the conversion of inputs in an accurate process due to the employment of lithographic production techniques. We present an addressing unit for ion-based quantum computing employing PICs that are arranged for multiple addressing zones inside a segmented ion-trap chip. The addressing unit is designed for individual and parallel addressing of single ions inside a chain of ten ions held by one trap segment. At PIC level, each addressing beam is realized with one waveguide channel and its mode field adapted to be optimal for imaging onto a trap segment. An additional imaging system in the same formfactor as the PIC, couples optically in free space from the waveguide channel to the individual ions. It is based on wafer-level microlenses combined in one stack and forms one unit with the PIC. Such a hardware-based capability eventually allows precise gate operations that are necessary for a universal quantum computer.