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  4. High-Speed Electrothermal Simulations for Power Modules with PEEC and Thermal Resistance Networks
 
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2025
Conference Paper
Title

High-Speed Electrothermal Simulations for Power Modules with PEEC and Thermal Resistance Networks

Abstract
The design process of power modules is a complex, multi-objective optimization task to balance several objectives, such as the maximum junction temperature and the parasitic inductance. Since state-of-the-art optimization processes require many simulations (more than 100,000), even established electric/thermal approaches are too slow for complex setups. Within this work, we demonstrate that a dynamic meshing strategy combined with vectorized and just-in-time compiled code can speed up a PEEC electric solver by several orders of magnitude. Moreover, we translate the thermal solver from the MATLAB-based ParaPower framework to Python and optimize it using sparse-matrix operations. These two solvers are highly parallelizable over the CPU cores, as we demonstrate by performing 150 electro-thermal simulations per second on a multi-core system. This significant increase in evaluation speed facilitates more rapid autonomous design optimization and enables the use of sophisticated AI techniques for designing power modules. Our primary concern is not to achieve the highest possible accuracy but to provide fast, approximate solvers that allow for quick exploration of the design space, a crucial step for efficient optimization.
Author(s)
Coelho, Rodrigo
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Zhang, Youyi
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Roßkopf, Andreas  
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Mainwork
IEEE Design Methodologies Conference, DMC 2025  
Conference
Design Methodologies Conference 2025  
DOI
10.1109/DMC65958.2025.11475286
Language
English
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
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