Analysis of Calibration and De-embedding for On-Wafer Characterization up to 170 GHz in 22-nm FDSOI CMOS Technology

This paper presents the analysis of calibration and de-embedding for S-parameter characterization up to 170 GHz in 22-nm FDSOI CMOS technology. On-wafer thru-reflect-line (TRL) calibration standards and de-embedding structures are designed for the analysis. In addition, measurement results of a transistor obtained by using probe-tip line-reflect-reflect-match (LRRM) calibration and on-wafer TRL calibration are demonstrated for comparison.