• English
  • Deutsch
  • Log In
    Password Login
    Research Outputs
    Fundings & Projects
    Researchers
    Institutes
    Statistics
Repository logo
Fraunhofer-Gesellschaft
  1. Home
  2. Fraunhofer-Gesellschaft
  3. Scopus
  4. On the Challenges and Design Mitigations of Single Transistor Ferroelectric Content Addressable Memory
 
  • Details
  • Full
Options
2024
Journal Article
Title

On the Challenges and Design Mitigations of Single Transistor Ferroelectric Content Addressable Memory

Abstract
In this work, we identify the potential challenges of ambipolar ferroelectric field effect transistor (FeFET) in building a single transistor CAM array to perform parallel hamming distance (HD) computations. The asymmetry in the two current branches of an ambipolar FeFET, such as different subthreshold swing (SS) and ON state current ${I}_{\mathrm{ ON}}$ , on the CAM functionality are analyzed, showing that both asymmetry sources can significantly degrade the HD functionality. Two alternative designs, i.e., one is a modified search strategy and the other one is a series current limiter, that can address the asymmetry issue are proposed and validated, thus shedding light on continuous optimization for ambipolar FeFET based designs.
Author(s)
Xu, Haotian
College of Information Science and Electronic Engineering, Zhejiang University
Yang, Jiangyi
Zhejiang University
Kämpfe, Thomas  orcid-logo
Fraunhofer-Institut für Photonische Mikrosysteme IPMS  
Zhuo, Cheng
Zhejiang University
Ni, Kai
University of Notre Dame
Yin, Xunzhao
College of Information Science and Electronic Engineering, Zhejiang University
Journal
IEEE Electron Device Letters  
Funder
National Natural Science Foundation of China  
DOI
10.1109/LED.2023.3334756
Language
English
Fraunhofer-Institut für Photonische Mikrosysteme IPMS  
Keyword(s)
  • Ambipolar FeFET

  • content addressable memory

  • hamming distance

  • symmetric conduction

  • Cookie settings
  • Imprint
  • Privacy policy
  • Api
  • Contact
© 2024