Soft-Error Analysis of RRAM 1T1R Compute-In-Memory Core for Artificial Neural Networks

This work analyses SEU-induced soft-errors in analog compute-in-memory cores using resistive random-Access memory (RRAM) for artificial neural networks, where their bitcells utilize one-Transistor-one-RRAM (1T1R) structure. This is modeled by combining the Stanford-PKU RRAM Model and the model of the radiation-induced photocurrent in access transistors. As results, this work derives the maximal RRAM crossbar size without occurring any logic flip and indicates the requirements for RRAM technology to achieve a SEU-resilient 1T1R compute-in memory cores.