Design of Low Noise Amplifier With Programmable Gain for PMUT Analog Frontends

This thesis presents the design of a low noise amplifier (LNA) with programmable gain for the piezoelectric micromachined ultrasonic transducer (PMUT) analog front end. With growing demand for compact, low cost, and energy efficient ultrasound devices, integrating analog front end circuits with the transducer has become essential to reduce power consumption and area. A single-ended capacitive feedback cascaded inverter voltage amplifier topology is selected to achieve optimal trade-off between noise and power. There is improved current efficiency because the inverter structure provides twice transconductance for the same current. The LNA is designed using 180 nm BCD SOI technology meeting the specification of 0–24 dB gain, 1 MHz–10 MHz bandwidth, 15 nV of input referred noise, and total power consumption of 360 µW. This design is employed using the gm/ID method to design all the blocks. The complete system integrates a cascoded inverter amplifier, a DC control loop using a symmetrical OTA-based error amplifier, a first-order temperature-compensated current reference, and a biasing network that minimizes power consumption. Programmable gain is achieved through a capacitor switching network providing discrete steps of 0 dB, 12 dB, and 24 dB. PVT and Monte Carlo simulations verified that the design remains robust under process, voltage, and temperature variations. Post-layout results demonstrate a bandwidth of 29 MHz, input referred noise of 12.03 nV, and power dissipation of 0.28 mW, all within the defined design targets for nominal cases. All specifications were met under PVT variations except for post-layout input referred noise, which deviates by 0.6 nV due to parasitic effects in the layout. The finalized layout occupies 0.22581 mm × 0.14751 mm = 0.033 mm², making it suitable for pitch-matched applications. It utilizes cross-coupled and common-centroid matching techniques in the capacitor array to suppress process-induced mismatch and gradient errors. Compared with recent state-of-the-art implementations, the proposed design achieves the lowest noise-power figure of merit (0.058 nV√W/√Hz) at 5 MHz, while maintaining high linearity and compact area. Overall, this work demonstrates a low-power, low-noise, and process-tolerant LNA architecture suitable for integration in next-generation PMUT-based portable ultrasound imaging systems.