A Reading Scheme for 3T3R RRAM and Their Arrays Recognizing 64 States

Resistive random-access memory (RRAM) has attracted significant interest due to its promising characteristics. This work introduces a three-transistor three-resistor (3T3R) architecture, accompanied by a novel readout strategy specifically designed for this structure. The proposed method significantly expands the number of accessible states compared to conventional read circuits used with one-transistor one-resistor (1T1R) RRAM cells. A total of 64 distinct states can be generated, each of which can be read within 18ns. The complete read operation consumes 66.67µW of power, accounting for all components.