Routing Spiking Neural Networks onto Field Programmable Spiking Neuron Array

This thesis presents the routing of small-world spiking neural networks(SNN) onto a neuromorphic hardware platform known as FPSNA, a field-programmable spiking neuron array featuring a 32×32 grid architecture. The primary objectives are to optimize routing time, routing resource utilization and achieve high routability for various spiking neural networks. Thereby, a benchmarking of the chip’s design is enabled. FPSNA comprises core architectural elements including mixed-signal neurons, switch boxes and spike inputs and outputs. The neurons perform spike based computation, while the switch boxes establish programmable but runtime static synaptic connections between neurons based on the network topology. These switch boxes incorporate multiplexers and skip connections to flexibly form logical links, enabling scalable and programmable routing.
The focus of this work is twofold: the construction of a benchmark of small world SNN and the exploration and refinement of routing algorithms to map these networks onto the FPSNA. The suitability of multiple known routing algorithms are analyzed and a modified version of the Pathfinder algorithm is employed for routing various benchmarking spiking Neural Networks, leveraging a bidirectional search strategy to enhance shortest path computation. Significant improvements in routing efficiency have been achieved by optimizing congestion handling mechanisms, resulting in a tenfold reduction in routing time while maintaining high success rates. This work demonstrates the potential of the FPSNA architecture as a robust and flexible neuromorphic substrate for complex spiking neural networks and highlights the importance of algorithmic innovations in enhancing hardware-software co-design for next-generation neural computation.