An Area-Efficient Integrated RF Reflectometer Based on Low-Power Logarithmic Power Detector

In this article, an area-efficient radio frequency (RF) scalar reflectometer is presented. Coupled incident and reflected power waves are detected with a low-power logarithmic detector without utilizing active RF amplifiers. The differential output voltage of the power detector (PD) is converted to a digital code, which is proportional to the return loss in decibels. A current-mode successive approximation register (SAR) analog-to-digital converter (ADC) with a reference digital-to-analog converter modulated with digital-to-time conversion is adopted to minimize the area of the readout circuitry while maintaining a high linearity. The device is implemented in a 90-nm RF silicon-on-insulator (SOI) complementary metal-oxide-semiconductor (CMOS) technology, occupying a core area of 0.37mm2 . The implemented reflectometer demonstrates a measurement error of less than 2dB for load points with return loss worse than 15dB from 900MHz to 2.5GHz . The implemented reflectometer consumes a dc current of 190μA from a 1.8 V supply during detection.