Designing and Implementation of low noise current source in cadence and comparing the results with Literature

High-precision analogue and mixed-signal circuits, critical in applications such as scientific equipment, medical imaging, and sensor interfaces, require extremely stable and silent biassing for maximum performance. The intrinsic noise of current sources, which are essential building elements in these systems, frequently becomes a limiting issue, reducing overall signal integrity and resolution. This thesis addresses this important challenge by describing the systematic design, analysis, and optimisation of low-noise current sources based on advanced current mirror topologies. The core of this research involves a comprehensive investigation into the noise performance of various current mirror architectures. A detailed theoretical analysis of dominant noise mechanisms in MOS transistors, including thermal and flicker (1/f) noise, provides the foundation
for evaluating different designs. The study progresses from the basic current mirror to more sophisticated structures, including the cascode, folded cascode, and Wilson current mirror topologies. Key design techniques, such as strategic device sizing (W/L ratios) and optimal biasing, are systematically explored to minimize noise contributions from each component. The proposed designs were implemented and rigorously simulated using a 130nm CMOS process technology. A comparative analysis reveals the inherent trade-offs between output impedance, compliance voltage, power consumption, and noise performance for each topology. The results demonstrate that the Improved Wilson current mirror architecture achieves a superior balance, providing both high output impedance and significantly reduced noise. The final optimized design delivers a stable 10 μA output current with a simulated output noise density of 144.39 nV/√ Hz at 100 Hz, marking a substantial improvement over conventional implementations. This thesis provides valuable design guidelines for developing low-noise current sources tailored for general applications. The findings confirm that through careful topological selection and meticulous device-level optimization, the noise performance of analog integrated circuits can be significantly enhanced, enabling new frontiers in measurement and sensing technologies.