Fully-Integrated Differential RRAM Cell Designs with Multi-Level Capability and Enhanced Read Margin

This work presents three differential RRAM memory cell designs, that enable multi-state operation. By adding switchable resistances as well as sequential read and programming operations, the proposed configurations enhance memory stability and enable easy system integration by providing a fully-digital interface without the need of analog references. They can combine the advantages of differential memory cells and RRAM’s multi-level capability. The concepts were realized using a CMOS-integrated RRAM technology and completely integrated in a standard cell grid. The proposed concept has potential to be extended to even more levels and can be adapted to different resistive switching technologies.