Multi-Partner Project: Reverse Engineering Methods for Trusted Chip Design (RESEC)

The RESEC (REconstruction of highly integrated SECurity devices) project addresses the growing concerns of malicious modification and IP piracy in globally distributed supply chains. The project's primary objective is to develop, verify, and optimise a complete reverse engineering process for integrated circuits manufactured in technology nodes of 40 nm and below. This paper highlights the significant contributions of RESEC in the areas of sample preparation, computer vision, and netlist analysis, thereby extending the state-of-the-art in hardware reverse engineering. The project results are expected to profoundly impact the development and physical verification of trusted chips, paving the way for future research.