Low Voltage Bandgap Reference using Intelligent Layout Generators in 22 nm FDSOI CMOS

This paper presents a low-voltage bandgap reference (BGR) circuit fabricated using 22 nm CMOS fully-depleted silicon on insulator (FDSOI) technology, incorporating an adaptive body-basing technique. During the design phase, the gm/ID methodology and the Intelligent IP (IIP) generators are utilized as essential reference strategies. The circuit occupies a chip area of 0.044 mm2 and consumes only 1.8 µA of current from a 1.5 V DC supply voltage. It provides an output reference voltage of 610 mV, with a temperature coefficient (TC) of 37 ppm/°C. Additionally, it provides a current reference of 0.4 µA, with a temperature coefficient of 60 ppm/°C, and operates effectively over a wide temperature range of -40 °C to 125 °C. Furthermore, the proposed circuit offers a power supply rejection ratio of 63 dB, making it a suitable solution for low-power, stable reference voltage applications.