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2023
Conference Paper
Title
A RRAM Characterization System with Flexible Readout Operations using an Integrating ADC
Abstract
Resistive random-access memories (RRAM) suffer from process variabilities. To mature the fabrication process, it is essential to evaluate the critical operating conditions precisely. This work proposes an integrated system for characterizing on-chip RRAMs. The proposed system consists of two major parts: Accessing circuits that allow programming RRAM with external references and a flexible readout circuit using a calibratable integrating analog-to-digital converter (ADC). The design allows a flexible selection of the readout voltage from 0 to 500mV and the readout time from 0.12 μs to 510 μs by adjusting the system's clock frequency and output precision. The simulation shows a readout error less than 0.5 LSB for maximal input using offset calibration. The proposed system is designed using IHP 130nm Technology.
Author(s)