Numerical Simulation of Thermal Silicon Dioxide Growth in the Gap between Stacked Wafers

Stacking of wafers for thermal processing enables a strong increase of the throughput and thus offers a high potential for cost reduction in solar cell production. In previous studies, the high temperature stack oxidation (HiTSOx) approach showed promising solar cell results and homogeneous thermal oxide growth over the wafer surface within the stack. In this work, we investigate the thermal oxide growth in the gap between stacked wafers where the wafer surfaces touching each other. We perform finite element method (FEM) simulation to identify the mechanism for the oxygen transport inside the gap and compare the simulated layer thickness to experimental data. In this simulation, the gap height is an important parameter. Therefore, we present a gravimetric-density approach to experimentally determine the gap height. Further, passivated emitter and rear (PERC) solar cells are fabricated using the HiTSOx approach. A high open-circuit voltage of Voc = 694 mV confirms the high quality of the surface passivation achieved in the stack oxidation.