Hot Carrier Injection and Bias Temperature Instability in 4H-SiC CMOS Technology

N- and p-channel metal oxide semiconductor field effect transistors (N-MOSFETs, P-MOSFETs) have a wide range of applications today but have their limits to operate in harsh environments with temperatures above 300°C or with high rates of radiation. Transistors realised with Silicon Carbide (SiC) as compound semiconductor are candidates to overcome these issues and have been used as power semiconductors for years already. Current research efforts focus on microscopic degradation mechanisms in SiC transistors, known as Hot Carrier Injection (HCI) and Positive Bias Temperature Instability (PBTI) in NFETs and negative BTI (NBTI) in PFETs. We investigated the reliability of SiC NFETs and PFETs with respect to HCI, NBTI and PBTI degradation models by adapting stress voltage levels and temperature. The JEDEC standards describing the procedures for measuring the degradation mechanisms in Si integrated transistors were used to set up the corresponding measurements for SiC transistors. This allows the comparison of the degradation behaviour between the two different materials.