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  4. Automated Creation of Reusable Generators for Analog IC Design with the Intelligent IP Method
 
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December 6, 2022
Presentation
Title

Automated Creation of Reusable Generators for Analog IC Design with the Intelligent IP Method

Title Supplement
Presentation held at Design and Verification Conference and Exhibition Europe, DVCon 2022, Munich, Germany, December 6 - 7, 2022
Abstract
Procedural generators are often proposed for analog IC design automation. They promise to encapsulate designer knowledge and intellectual property (IP) data in a deterministic and reusable way. While recent developments claim to have proven this, one question remains: How to create generators efficiently and integrate them in an automated design flow? A major challenge for generators is the trade-off between initial implementation effort, reusability, and acceptance. This raises further questions on the role of the generator supplier: Who should spend the effort implementing and maintaining generator IP? Which interfaces and standards can be used to implement and integrate them into common design environments? In order to address these challenges, we propose a combination of pre-defined generators for basic building blocks at lower hierarchy levels with automatic creation of generators using place and route templates for more complex circuits. The paper demonstrates the successful application of this flow to an OTA design and discusses the required implementation efforts, quality of the generated results and potential future developments.
Author(s)
Eichler, Uwe  orcid-logo
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Prautsch, Benjamin  orcid-logo
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Reich, Torsten  orcid-logo
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Project(s)
Automatisierter Chip-Entwurf für Radarsensoren und Kommunikationselektronik mit Millimeterwellen  
Funder
Bundesministerium für Bildung und Forschung -BMBF-  
Conference
Design and Verification Conference and Exhibition Europe 2022  
File(s)
Download (1.15 MB)
Rights
Use according to copyright law
DOI
10.24406/publica-712
Language
English
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Keyword(s)
  • analog

  • layout

  • generators

  • templates

  • design automation

  • reuse

  • soft IP

  • IntelligentIP

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