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  4. Proven Power Cycling Reliability of SmartSiC™ Substrate for Power Devices
 
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2022
Conference Paper
Title

Proven Power Cycling Reliability of SmartSiC™ Substrate for Power Devices

Abstract
The Smart Cut™ technology enables the integration of a high-quality SiC layer transfer for device yield optimization, combined with a low-resistivity handle wafer (below 5mOhm.cm) to lower device conduction and switching losses. More than 550000 cycles without any failure have been demonstrated during Power Cycling Tests, with a temperature swing of 120K. Evolution of thermal resistance is within the specification of AQG324 standards (2021 revision). This test is a validation of the reliability of our SmartSiC™ engineered substrate.
Author(s)
Guiot, Eric
Soitec S.A.
Picun, Gonzalo
Soitec S.A.
Allibert, Frederic
Soitec S.A.
Leib, Jürgen  
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Becker, Tom  
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Schwarzenbach, Walter
Soitec S.A.
Drouin, Alexis
Soitec S.A.
Béthoux, Jean-Marc
Soitec S.A.
Widiez, Julie
CEA LETI
Rouchier, Severin
Soitec S.A.
Erlbacher, Tobias  
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Mainwork
PCIM Europe 2022, International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management. Proceedings  
Conference
International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management 2022  
DOI
10.30420/565822081
Language
English
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
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