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2022
Conference Paper
Title
A Superheterodyne 300GHz Transmit Receive Chipset for Beyond 5G Network Integration
Abstract
This paper presents a compact solid-state, fully integrated transmitter and receiver chipset operating at 300GHz fabricated using a 35nm gate-length InGaAs metamorphic high-electron-mobility transistor technology. Both circuits integrate a fundamental frequency converter. The local oscillator path consists of a multiplier by three and a buffer amplifier. The transmitter uses a power amplifier as an output stage for increased output power. The first stage in the receiver is a low-noise amplifier. The transmitter achieves a high linearity: The output-referred 1-dB compression point lies at -3dBm. The receiver has a conversion gain of around 10dB without any IF post amplification and an estimated noise figure of 7.3dB. The absolute 3dB RF bandwidth of the system is 42GHz, ranging from 288GHz to 320GHz. The local oscillator input frequency can vary between 72 and 75.5GHz. The particularity of this chipset is the very high and wideband IF frequency range, from 75 to above 91GHz. This superheterodyne architecture and the compatibility to IF systems composed of wireless links developed in the frame of 5G enables the integration into a real network, bringing 300GHz communication networks a step closer to being implemented in applications like front- and back-hauling.
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