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  4. Implementation and evaluation of a neural network-based LiDAR histogram processing method on FPGA
 
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2021
Conference Paper
Title

Implementation and evaluation of a neural network-based LiDAR histogram processing method on FPGA

Abstract
In applications of advanced driver assistance systems (ADAS), a single photon avalanche diode (SPAD)-based direct time-of-flight (d-TOF) LiDAR system is one of the promising range sensor systems. Many processing algorithms based on this LiDAR system have been developed. Therein, neural network-based multi-peak analysis (NNMPA) is a LiDAR histogram processing method, which improves the distance measurement robustness under harsh environment conditions, e.g. high ambient light or large distances. However, the portability of the NNMPA on embedded systems remains challenging and should be further implemented and evaluated. In this paper, the NNMPA is implemented on Enclustra Mars ZX3 FPGA board to enable a system-on-chip (SoC) test of the method. The presented implementation achieves a frame rate of 20 fps with 96 pixels. The accuracy drop-off of 1.23 % is observed compared to the floating-point arithmetic implementation on PC.
Author(s)
Chen, Gongbo  
Fraunhofer-Institut für Mikroelektronische Schaltungen und Systeme IMS  
Kirtiz, Giray Atabey
UDE
Wiede, Christian  
Fraunhofer-Institut für Mikroelektronische Schaltungen und Systeme IMS  
Kokozinski, Rainer  
Fraunhofer-Institut für Mikroelektronische Schaltungen und Systeme IMS  
Mainwork
IEEE 34th International System-on-Chip Conference, SOCC 2021  
Conference
International System-on-Chip Conference 2021  
DOI
10.1109/SOCC52499.2021.9739527
Language
English
Fraunhofer-Institut für Mikroelektronische Schaltungen und Systeme IMS  
Keyword(s)
  • light detection and ranging (LiDAR)

  • neural network

  • field-programmable gate array (FPGA)

  • data processing

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