Process-based Modeling of 4H-SiC Double-trench MOSFETs with Reshaped Trench Geometries

A double trench MOSFET is proposed due to the fact that the double trench structure in both gate and source regions is favorable for shielding a dielectric at the trench bottom where the dielectric breakdown mainly occurs during high drain source voltage application. Previous studies showed trench structures are formed after ion implantation (trench last process). Whereas maximal alignment accuracy can be obtained, a drawback of trench last process is the difficulty to control the etching behavior of the implanted 4H SiC. In this work, the manufacturing process, in which a formation of trenches is followed by n source and p well implantation (trench first process) based modeling of double trench MOSFET and the influence of ion implantation parameters on electrical characteristics is described by using TCAD process and de vice simulation implemented in Synopsis Sentaurus.