Design of an artificial neural network circuit for detecting atrial fibrillation in ECG signals

In this paper we present the design of a low-power on-chip sensor signal processing system which analyzes electrocardiogram (ECG) data for signs of atrial fibrillation. By optimizing an artificial neural network and using highly optimized and flexible register-transfer-level circuit models, an energy-efficient digital circuit was designed with a regular standard cell synthesis design flow in a 130 nm CMOS technology. The resulting circuit consumes 360 nJ of energy for the processing of one complete ECG trace and occupies 5 mm 2 of silicon in the chosen target CMOS technology. While some of the methods are specific to the task, the general principles can be adapted to other signal analysis tasks and allow the use of machine learning under constraints of energy, size and cost.