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  4. Low Cost FPGA based Implementation of a DRFM System
 
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2019
Conference Paper
Title

Low Cost FPGA based Implementation of a DRFM System

Abstract
Digital Radio Frequency Memory (DRFM) is a technique used to record an incoming Radio Frequency (RF) signal and apply series of time-delays, amplitude scalings and frequency shifts before retransmitting the signal in an effort to deceive a radar system. This technique is used widely in the electronic defense industry as a form of radar countermeasure by synthesising artificial targets. The design and implementation of a DRFM system on a low cost Field Programmable Gate Array (FPGA) is shown along with an investigation of the performance of the system architecture.
Author(s)
Mesarcik, Michael B.
O'Hagan, Daniel W.
Paine, Stephen
Mainwork
IEEE Radar Conference, RadarConf 2019  
Conference
Radar Conference (RadarConf) 2019  
DOI
10.1109/RADAR.2019.8835754
Language
English
Fraunhofer-Institut für Hochfrequenzphysik und Radartechnik FHR  
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