Characterization of a silicon carbide BCD process for 300°C circuits

This paper describes a silicon carbide (SiC) Bipolar-CMOS-DMOS (BCD) process technology and presents the corresponding characterization results. The process enables the design of integrated circuits (ICs) capable of high temperature operation and heterogeneous integration into SiC power modules. The paper showcases the cross-section of the triple-well, single metal layer SiC BCD process and details the key process challenges. Characterization results for NMOS, PMOS, LDMOS, and BJT structures are presented. DC output characteristics of the standard 1.5 mm NMOS and PMOS are shown for temperatures of 25°C and 300°C. The drain-to-source breakdown voltages observed for the LDMOS (at 1 nA leakage) is 178 V at 25°C. The integrated passives available in the process include N-diffusion resistors with a sheet resistance of approximately 1.2 kO/OS and poly-to-N-diffusion capacitors with 0.612 fF/mm 2 capacitance.