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2019
Poster
Title
Influence of shallow pits and device design of 4H-SiC VDMOS transistors on in-line defect analysis by using PL scanning
Title Supplement
Poster presented at 18th International Conference on Silicon Carbide & Related Materials, September 29th - October 04th, 2019, Kyoto, Japan
Author(s)
File(s)
Rights
Use according to copyright law
Language
English