A new concept to compensate the loop gain variation in phase-locked loops for wideband microwave frequency ramp synthesis

Synthesizers for wideband, low noise, linear frequency ramps based on phase-locked loops (PLL) exhibit a wide variation of the loop gain if no compensation method is applied. We present a new compensation method based on a phase-frequency detector gain modulation avoiding an external logic control, additional phase noise and high hardware complexity. Based on measured characteristics of its components, a 60 GHz-PLL with the new compensation method has been simulated, reducing the loop gain variation by a factor of 6.2 and the maximum double-sideband RMS phase jitter from 0.0422 rad to 0.0320 rad.