Parasitic inductance analysis of a fast switching 100 kW full SiC inverter

This paper presents a method for analysing the stray inductances in fast switching applications for highly integrated drive inverters. The investigations are carried out using 3D field simulations to verify commutation loop inductances of complex three-dimensional designs. It is shown that the simulations deliver reliable results and that this technique can be already used in the early design stage. Furthermore, it is proven that the placement and connection of the DC-link capacitor can be evaluated and the effectiveness of additional bypass capacitors or snubbers can be assessed. For the validation of the procedure, a 3D field and a lumped element model of a fast switching 100 kW full SiC inverter for automotive traction were set up and experimentally validated.