Fundamental efficiency limits in power electronic systems

In this paper, the efficiency limits of power electronic converters are investigated from a semiconductor point of view. The approach is presented on the example of a hard switching half bridge while taking Si, SiC and GaN devices into account. Beside parasitic effects of the semiconductors itself, further converter non-idealities and limits from a thermal point of view are discussed. All in all, the obtained results act as a design guideline and allow for an easy comparison of different semiconductor technologies.