Modelling current filamentation in Circuit Simulation

Electrostatic discharge (ESD) can be considered as one of the primary reliability risks of today's electronic systems and causes failure of semiconductor devices by an over current effect. In case of an ESD event the avalanche breakdown leads to current filamentation and self-heating. This results in very localized damage which typically manifests in leakage current due to gate oxide breakdown or junction damage. In a nominal circuit simulation those effects are not included, so it is required to use additional models. However, current conduction is a non-linear problem and can only be solved by using a physics-based device simulator like TCAD (Technology Computer Aided Design). TCAD gives very accurate results, but only for single devices and has an intolerable runtime. To improve the performance and to enable a fast optimization process during the design phase of a protection structure, we suggest a physics-based compact model capturing the relevant effects occurring under ESD load. One major advantage is the possibility to include the model into a circuit simulation.