Analog-circuit NBTI degradation and time-dependent NBTI variability

We experimentally and theoretically investigate the NBTI degradation of pMOS devices due to analog stress voltages and thus go beyond existing NBTI studies for digital stress. As a result, we propose a physics-based compact model for analogstress NBTI which builds upon the extensive TCAD analysis of our ultra-short-delay experimental data. The numerical efficiency of the compact model allows its direct coupling to electric circuit simulators and permits to accurately account for NBTI degradation already during circuit design. Our model enables the calculation of the time-dependent NBTI variability of single device and of circuit performance parameters. We demonstrate our NBTI model on an operational amplifier and calculate the mean drift and variability of its offset voltage.