Multi-scale radiographic applications in microelectronic industry

New concepts in assembly technology boost our daily life in an unknown way. High end semiconductor industry today deals with functional structures down to a few nanometers. ITRS roadmap predicts an ongoing decrease of the ""DRAM half pitch"" over the next decade. Packaging of course is not intended to realize pitches at the nanometer scale, but has to face the challenges of integrating such semiconductor devices with smallest pitch and high pin counts into systems. System integration (SiP, SoP, Hetero System Integration etc.) into the third dimension is the only way to reduce the gap between semiconductor level and packaging level interconnection. The described development is mainly driven by communication technology but also other branches like power electronics benefit from the vast progress in integration and assembly technology. The challenge of advanced packaging requires new nondestructive evaluation (NDE) techniques for technology development and production control. In power electronics production the condition monitoring receives a lot of interest to avoid electrical shortcuts, dead solder joints and interface cracking. It is also desired to detect and characterize very small defects like transportation phenomenon or Kirkendall voids. For this purpose imaging technologies with resolutions in the sub-micron range are required. Our presentation discusses the potentials and the limits of X-ray NDE techniques, illustrated by crack observation in solder joints, evaluation of micro vias in PCBs and interposers and the investigation of solder material composition and other aftermaths of electro migration in solder joints. Applied radiographic methods are X-ray through transmission, multi-energy techniques, laminography, CT and nano-CT.