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  4. Facilitate SIMD-code-generation in the polyhedral model by hardware-aware automatic code-transformation
 
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2013
Conference Paper
Title

Facilitate SIMD-code-generation in the polyhedral model by hardware-aware automatic code-transformation

Abstract
Although Single Instruction Multiple Data (SIMD) units are available in general purpose processors already since the 1990s, state-of-the-art compilers are often still not capable to fully exploit them, i.e., they may miss to achieve the best possible performance. We present a new hardware-aware and adaptive loop tiling approach that is based on polyhedral transformations and explicitly dedicated to improve on auto-vectorization.
Author(s)
Feld, Dustin
Soddemann, Thomas  
Jünger, Michael
Mallach, Sven
Mainwork
IMPACT 2013, 3rd International Workshop on Polyhedral Compilation Techniques. Proceedings  
Conference
International Workshop on Polyhedral Compilation Techniques (IMPACT) 2013  
International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC) 2013  
File(s)
Download (981.1 KB)
Rights
Use according to copyright law
DOI
10.24406/publica-fhg-379841
Language
English
Fraunhofer-Institut für Algorithmen und Wissenschaftliches Rechnen SCAI  
Keyword(s)
  • polyhedral model

  • vectorization

  • SIMD

  • SSE

  • cache

  • parallelization

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