Performance modeling of design patterns for distributed computation

The design and implementation of distributed systems is helped by the availability of design patterns which offer robust and reliable solutions for the processing of parallel messaging. We develop continuous-time Markov chain models of two commonly used design patterns, Half-Sync/Half-Async and Leader/Followers, for their performance evaluation in multi-core machines. We propose a unified modeling approach which contemplates a detailed description of the application level logic and abstracts away from operating system calls and complex locking and networking application programming interfaces. By means of a validation study against implementations on a 16-core machine, we show that the models accurately predict peak throughputs and variation trends with increasing concurrency levels for a wide range of message processing workloads. We also discuss the limits of our models when memory-level internal contention is not captured.