Determination of across-wafer variations of transistor characteristics by coupling equipment simulation with technology computer-aided design (TCAD)

The impact of etching-induced variations of the gate geometry on the electrical performance of MOSFETs and SRAM cells has been investigated. This is achieved by a new methodology which is based on combining multi-physics simulations, TCAD simulations, and SPICE (simulation program with integrated circuit emphasis) simulations. For describing the etching of the transistor gate electrode, an inductively coupled plasma (ICP) reactor with chlorine chemistry is considered. Equipment simulations for fixed conditions have been carried out, providing the fluxes of neutral and ionic species for all positions on a 200 mm wafer. Taking these fluxes as input boundary conditions, feature-scale simulations using a surface etching model with a Monte Carlo implementation have been performed. From the simu lation results the frequency distribution of the gate critical dimensions (CD) has been extracted. This information was passed to SPICE simulations for PMOS and NMOS transistors as well as for an SRAM cell. As result, the probability distributions of the threshold voltages of the transistors and of the static noise margin (SNM) of the SRAM cell are obtained. For all distributions, a strong asymmetry is observed.