Three-dimensional simulation of the channel stop implant effects in sub-quarter micron PMOS transistors

The possibility to suppress the narrow channel effect due to the crowding of the leakage current near the edge of the active area in sub-quarter micrometer MOS transistors by means of a special channel stop implant has been investigated using coupled three-dimensional process and device simulation. Optimum ion implantation conditions for the suppression of the parasitic current crowding in a 0.16 µm PMOS transistor with an arsenic doped channel were found.