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  4. Optimization of critical ion implantation steps in 0.18 mu m CMOS technology
 
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1998
Conference Paper
Title

Optimization of critical ion implantation steps in 0.18 mu m CMOS technology

Author(s)
Burenkov, A.  
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Wittl, J.
Schwalke, U.
Lorenz, J.  
Ryssel, H.
Mainwork
ESSDERC '98  
Conference
European Solid-State Device Research Conference (ESSDERC) 1998  
Language
English
IIS-B  
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