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1997
Conference Paper
Title
Realization and evaluation of an ultra low-voltage/low-power 0.25 mu m (n+/p+) dual-workfunction CMOS technology
Other Title
Realisierung und Evaluierung einer Niedervolt/Energiespar 0.25 mu m (n+/p+) Dual-Gate-CMOS-Technologie
Abstract
The ultimate goal for low power applications is aimed at single-battery operation with a nominal supply voltage of 1.2V and an end-of-life voltage of 0.9V. In this work results on process optimization, device characterization, dynamic performance and hot carrier degradation of an ultra low-power/low-voltage (1.2V) quarter-micron dual-workfunction CMOS technology with low process complexity are presented.
Author(s)