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  4. On-chip emulation and debugging for embedded microcontrollers using the IMS ScanDebugger
 
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1995
Conference Paper
Title

On-chip emulation and debugging for embedded microcontrollers using the IMS ScanDebugger

Abstract
We present an on-chip emulation strategy using the ASICs built-in chip test support circuitry. Scan-paths, widely used to achieve testability for ASICs, can be used to view and modify the chip state for debugging and verification purposes. With the interactive IMS ScanDebugger, we present a software tool that adds emulator functionality to scanable ASICs. We suggest using an IEEE 1149.1 Boundary Scan Test compatible test interface.
Author(s)
Sievert, K.
Manoli, Y.
Both, A.W.
Lerch, R.G.
Mainwork
The European Design and Test Conference, ED&TC 1995. Proceedings  
Conference
European Design and Test Conference (ED&TC) 1995  
Language
English
Fraunhofer-Institut für Mikroelektronische Schaltungen und Systeme IMS  
Keyword(s)
  • ASIC

  • built-in test equipment

  • digital integrated circuits

  • digitale integrierte Schaltung

  • Emulation

  • Fehlersuche

  • IEEE 1149.1

  • ITAG

  • microcontrollers

  • Mikrocontroller

  • Prüfschaltung

  • test circuits

  • trouble shooting

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