Verfahren und Phasenregelkreis zum Synchronisieren eines Ausgangssignals mit einem Eingangssignal unregelmaessiger und/oder stark ausgeduennter Flankendichte

DE 2854039 C UPAB: 19930902 The phase locked loop derives sample pulses from the edge changes in the input signal and uses them to sample the instantaneous amplitude of the reference signal. This amplitude bears a given relationship to the phase of the reference signal and is used as a measure of the difference between the input and reference signal for forming the control signal that controls the voltage-controlled oscillator. The reference signal may be sinusoidal, triangular, or an asymmetric sawtooth. The control input of the phase detector is connected to a stage that shapes the sample pulses. A hold capacitor is charged to a wanted value by several samples of the reference signal's amplitude.