Monolithic millimeter-wave integrated circuits for low-power wireless communication systems with high data rates

Wireless communication is a fundamental need in today's information society. While the total global data traffic grows continuously, the mobile portion increases twice as fast. In addition, even higher data rates are necessary for enabling, e.g., high-definition video streaming or mobile gaming. Both requirements put pressure on the efficiency of wireless communication systems since an increasing data rate and data volume consequently induce a higher power consumption and diminish the battery life of mobile powered devices even further. In this work, innovative solutions for RF (radio frequency) frontend transmit and receive MMICs (monolithic microwave integrated circuits) with high data rates and a low power consumption are investigated and developed. It is demonstrated in this thesis that wireless communication systems have to be optimized on system, circuit, and device levels in order to achieve high data rates and a low power consumption, simultaneously. On system level, mainly three points are particularly important. First, an efficient system is reduced to a few, most necessary building blocks. This also interacts with the second point; the power consumption of a system can be reduced by using a direct-modulation/demodulation approach. Third, building blocks or topologies with a high demand on a linear operation should be avoided. Thus, the TX (transmitter) approaches that are investigated and realized in this work are based on DC (direct current) and RF-switched oscillators and the RX (receiver) topology uses envelope detectors as a direct demodulator. This allows minimizing the number of building blocks. The investigations of a low-power high-speed TX are focused on the two utilized components, the carrier-signal generation and the amplitude modulation. For the RF carrier-signal generator, the oscillator principle, the optimum transistor gate width, and the frequency tuning in a series feedback oscillator are analyzed which leads to a VCO(voltage-controlled oscillator) MMIC which demonstrates, with 29.3 %, the highest drain efficiency of a VCO MMIC at W-band frequencies (75 GHz-110 GHz) so far. The analysis and realization of transistor stacking illustrate that it can be used to efficiently increase the output power of oscillators if needed. The study also includes the first equation for the maximum number of transistors that can be efficiently stacked. The demonstrated VCO MMIC exhibits the highest output power (15 dBm) in W-band and a superior drain efficiency of 23.3 %. The amplitude modulation of the DC-switched TX is investigated and beside an efficient VCO, the ratio between the gate width of the switching and the oscillating transistor is a crucial parameter. The realized MMIC achieves a data rate of3 Gbit/s and a FOMtx (figure of merit of a communication TX) of 1.1 Gbit/s. In this work, RF switches realize the amplitude modulation of the RF-switched transmitters. Based on the given analyses, SPST (single-pole, single-throw) and asymmetric SPDT(single-pole, double-throw) switches are preferable. If an oscillator requires a good input matching for high and low state of the modulator, an asymmetric SPDT switch is the best option since it provides less losses than a standard SPDT switch but, unlike anvi Abstract SPST switch, it has a proper input matching for both switch states. As a result of these findings, the demonstrated RF-switched TX MMICs exhibit, compared to previously published low-power high-speed transmitters with operating frequencies of up to at least 135 GHz, the highest data rates (20 Gbit/s and 26 Gbit/s) and improves the state-of-the-art FOMtx by a factor of 2.1 and 3.2, respectively. In this work, a direct-demodulation RX comprises a low-power wideband LNA (lownoise amplifier) and high-speed envelope detector. The two major requirements for such an RX MMIC are a low power consumption and a high data-rate performance. In the first of which, mainly the LNA has to be optimized for a low power consumption. The envelope detector is operated at zero-bias conditions and, thus, can be neglected for the power consumption of the RX. For the latter, a wideband performance of the LNA and the envelope detector is important, likewise. This is achieved by a carefully designed wideband topology of the LNA with wideband matching networks and inductive source degeneration in all stages. Furthermore, the drain voltage and current should ber educed. Consequently, the total gate width of the LNA should be as small as possible which favors common-source topologies. These findings result in an LNA MMIC that improves the FOMlna (figure of merit of an LNA) of the state of the art by 40 %.The analysis of the envelope detector includes, on circuit level, three different circuit approaches and, on device level, a layout optimization of integrated planar Schottkydiodes. For an improved wideband performance of the envelope detector, a branchline coupler-based topology is demonstrated to be highly suitable. A realized RX MMIC achieves a maximum data rate of 24 Gbit/s with a power consumption of 14.4 mW. The corresponding energy-data efficiency is by a factor of three better than state-of-the-art results. The maximum achievable data rate can be even further improved by a novel DIED (destructive-interference envelope detector). By avoiding the filtering of the carrier signal at the output of a common envelope detector, the DIED approach can increase the baseband bandwidth to 50% of the carrier frequency. The realized MMIC demonstrates a data rate of at least 26 Gbit/s. Finally, based on the finding of this work, a wireless link is demonstrated by using an RF-switched stacked-HEMT (high-electron-mobility transistor) transmitter MMIC and a receiver MMIC with a broadband low-power LNA and branchline detector. The real-time data link achieves a maximum data rate of 20 Gbit/s over a distance of 80 cm. This results in an efficiency of 5.2 pJ/bit for the entire TX and RX MMIC together. If the transmitted distance is taken into account, the efficiency is 6.5 pJ/(bit m). The best previously-published results achieve an efficiency of 62.6 pJ/(bit BLm) with a data rate of10.7 Gbit/s over a distance of 10 cm or 52.5 pJ/(bit BL m) with a data rate of 4 Gbit/s over a distance of 55 cm.