Future challenges in CMOS process modelling

Development and optimization of electronic devices in industrial and academic environments would hardly be conceivable without the numerical simulation of their processing and electronic behavior. In the past, model development efforts aimed especially at predicting junction depths. With the paradigm shift towards ultra-thin body silicon-on-insulator devices and FinFET architectures, the main emphasis changed to activation and lateral diffusion. Based on simulations of the electrical behavior of such advanced devices, the requirements on simulation of doping profiles will be explained. To achieve the high dopant activation needed to reduce contact and channel access resistances, active concentrations if possible above solid solubility are required. The concepts pursued involve annealing wi th low thermal budgets as well as defect engineering. A further paradigm shift concerns the semiconductor material used for future devices. While silicon, especially in a strained state, is still in the lead, research is also looking for alternative materials like germanium, germanium-rich silicongermanium alloys, and IIIV compounds. In order to be helpful, models for such processes and materials have to be provided as soon as possible even if the complexity of models for alternative materials lags behind contemporary models for silicon. The personal view of the authors is guided also by the International Technology Roadmap for Semiconductors for which one of us coordinates the modeling and simulation chapter.