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  4. Threshold Voltage Adjustment on 4H-SiC MOSFETs Using P-Doped Polysilicon as a Gate Material
 
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2023
Journal Article
Title

Threshold Voltage Adjustment on 4H-SiC MOSFETs Using P-Doped Polysilicon as a Gate Material

Abstract
To scale digital circuits, symmetric threshold voltages (Vth) for n-type transistors (NMOS) and p-type transistors (PMOS) are important. One step towards this in silicon carbide (SiC) is selecting a p-doped polysilicon (pPolySi). This implementation has been shown in this work with Vth being evaluated by five different methods. Furthermore, operating temperatures up to 500 °C and their impact on Vth were investigated. It has been successfully demonstrated that elevated temperature shifts Vth of both transistor types towards 0 V, whereas changing the gate electrode from n-doped PolySi (nPolySi) to pPolySi shifts Vth of both transistor types to more positive values. Both effects are complementary for the PMOS, reaching Vth below 4 V.
Author(s)
May, Alexander  
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Rommel, Mathias  orcid-logo
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Abbasi, Affan
Erlbacher, Tobias  
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Journal
Key engineering materials  
Conference
International Conference on Silicon Carbide and Related Materials 2022  
Open Access
DOI
10.4028/p-w6bx49
Language
English
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Keyword(s)
  • 4H-SiC CMOS

  • PMOS

  • p-doped polysilicon

  • threshold voltage

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