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  4. Acquisition Time Reduction in Large-Area, High-Resolution Scanning Electron Microscopy-Analysis of Nanometer Integrated Circuits Through Deep Learning-Based Super Resolution
 
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2021
Master Thesis
Title

Acquisition Time Reduction in Large-Area, High-Resolution Scanning Electron Microscopy-Analysis of Nanometer Integrated Circuits Through Deep Learning-Based Super Resolution

Thesis Note
Karlsruhe, Inst. für Technologie (KIT), Master Thesis, 2021
Author(s)
Erbis, Joscha
Karlsruhe Institute of Technology
Person Involved
Gengenbach, Ulrich
Institute for Automation and Applied Informatics, Karlsruhe Institute of Technology, Karlsruhe, Germany
Gieser, Horst  
Fraunhofer-Einrichtung für Mikrosysteme und Festkörper-Technologien EMFT  
Publishing Place
Karlsruhe
Language
English
Fraunhofer-Einrichtung für Mikrosysteme und Festkörper-Technologien EMFT  
Keyword(s)
  • chip scanning

  • deep learning

  • super-resolution

  • integrated circuits

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