Implementation of sparse signal recovery on FPGA for ultrasonic NDT

For several use cases of complex processing algorithms on ultrasound NDT data, it is mandatory to ensure real-time signal processing speed. This can be achieved by using e.g. a field programmable gate array (FPGA). Sparse signal recovery (SSR) and compressed sensing (CS) methods are used for superior reconstruction of flaws from compressed measurement data. SSR and CS are currently a hot research topic in various fields of application. However, they are not yet implemented for ultrasound NDT in a real-time manner.