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  4. Numerical simulation of time delay and cross-talk noise for the interconnect in VLSI circuits
 
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2000
Journal Article
Title

Numerical simulation of time delay and cross-talk noise for the interconnect in VLSI circuits

Author(s)
Ruan, G.
Xiao, X.
Song, R.R.
Streiter, R.
Otto, T.
Gessner, T.
Journal
Acta Electronica Sinica  
Language
English
Fraunhofer-Institut für Zuverlässigkeit und Mikrointegration IZM  
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